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<div class="title">QSPI: Quad Serial Peripheral Interface Driver</div>  </div>
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<p>The MCUXpresso SDK provides a peripheral driver for the Quad Serial Peripheral Interface (QSPI) module of MCUXpresso SDK devices.</p>
<p>QSPI driver includes functional APIs and EDMA transactional APIs.</p>
<p>Functional APIs are feature/property target low level APIs. Functional APIs can be used for QSPI initialization/configuration/operation for optimization/customization purpose. Using the functional API requires the knowledge of the QSPI peripheral and how to organize functional APIs to meet the application requirements. All functional API use the peripheral base address as the first parameter. QSPI functional operation groups provide the functional API set.</p>
<p>Transactional APIs are transaction target high level APIs. Transactional APIs can be used to enable the peripheral and in the application if the code size and performance of transactional APIs satisfy the requirements. If the code size and performance are a critical requirement, see the transactional API implementation and write a custom code. All transactional APIs use the qspi_handle_t as the first parameter. Initialize the handle by calling the <a class="el" href="group__qspi__edma.html#gaa967a5d19c9866ad6af406ed5b1b0726" title="Initializes the QSPI handle for send which is used in transactional functions and set the callback...">QSPI_TransferTxCreateHandleEDMA()</a> or <a class="el" href="group__qspi__edma.html#ga01676dd06256f21171ec5b797f7f5023" title="Initializes the QSPI handle for receive which is used in transactional functions and set the callback...">QSPI_TransferRxCreateHandleEDMA()</a> API.</p>
<p>Transactional APIs support asynchronous transfer. This means that the functions <a class="el" href="group__qspi__edma.html#ga2afdd78aff220a2432ca52aa6c23e42b" title="Transfers QSPI data using an eDMA non-blocking method. ">QSPI_TransferSendEDMA()</a> and <a class="el" href="group__qspi__edma.html#ga2aedd369f612547837dd83dd88027cfc" title="Receives data using an eDMA non-blocking method. ">QSPI_TransferReceiveEDMA()</a> set up EDMA for data transfer. When the transfer completes, the upper layer is notified through a callback function with the kStatus_QSPI_Idle status. </p>
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Modules</h2></td></tr>
<tr class="memitem:group__qspi__edma"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi__edma.html">QSPI eDMA Driver</a></td></tr>
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<tr class="memitem:structqspi__dqs__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#structqspi__dqs__config__t">qspi_dqs_config_t</a></td></tr>
<tr class="memdesc:structqspi__dqs__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">DQS configure features.  <a href="group__qspi.html#structqspi__dqs__config__t">More...</a><br/></td></tr>
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<tr class="memitem:structqspi__flash__timing__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#structqspi__flash__timing__t">qspi_flash_timing_t</a></td></tr>
<tr class="memdesc:structqspi__flash__timing__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash timing configuration.  <a href="group__qspi.html#structqspi__flash__timing__t">More...</a><br/></td></tr>
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<tr class="memitem:structqspi__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#structqspi__config__t">qspi_config_t</a></td></tr>
<tr class="memdesc:structqspi__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI configuration structure.  <a href="group__qspi.html#structqspi__config__t">More...</a><br/></td></tr>
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<tr class="memitem:structqspi__flash__config__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#structqspi__flash__config__t">qspi_flash_config_t</a></td></tr>
<tr class="memdesc:structqspi__flash__config__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">External flash configuration items.  <a href="group__qspi.html#structqspi__flash__config__t">More...</a><br/></td></tr>
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<tr class="memitem:structqspi__transfer__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#structqspi__transfer__t">qspi_transfer_t</a></td></tr>
<tr class="memdesc:structqspi__transfer__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfer structure for QSPI.  <a href="group__qspi.html#structqspi__transfer__t">More...</a><br/></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga6bfca51c0942f0910fc73019f35a9b90">QSPI_LUT_SEQ</a>(cmd0, pad0, op0, cmd1, pad1, op1)</td></tr>
<tr class="memdesc:ga6bfca51c0942f0910fc73019f35a9b90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro functions for LUT table. <br/></td></tr>
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<tr class="memitem:ga25a69200802c0573901a61e4f942c2fb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga25a69200802c0573901a61e4f942c2fb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga25a69200802c0573901a61e4f942c2fb">QSPI_CMD</a>&#160;&#160;&#160;(0x1U)</td></tr>
<tr class="memdesc:ga25a69200802c0573901a61e4f942c2fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro for QSPI LUT command. <br/></td></tr>
<tr class="separator:ga25a69200802c0573901a61e4f942c2fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae30d16840c705584ef8ee3a63fc2ecbc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gae30d16840c705584ef8ee3a63fc2ecbc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gae30d16840c705584ef8ee3a63fc2ecbc">QSPI_PAD_1</a>&#160;&#160;&#160;(0x0U)</td></tr>
<tr class="memdesc:gae30d16840c705584ef8ee3a63fc2ecbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro for QSPI PAD. <br/></td></tr>
<tr class="separator:gae30d16840c705584ef8ee3a63fc2ecbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Enumerations</h2></td></tr>
<tr class="memitem:ga9006d37909032f8ad238cb8f953115a4"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga9006d37909032f8ad238cb8f953115a4">_status_t</a> { <br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga9006d37909032f8ad238cb8f953115a4a650abd7e718c3d31a1b1c31628223255">kStatus_QSPI_Idle</a> = MAKE_STATUS(kStatusGroup_QSPI, 0), 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga9006d37909032f8ad238cb8f953115a4adc835d439498f87c2f72a4b0681d64a9">kStatus_QSPI_Busy</a> = MAKE_STATUS(kStatusGroup_QSPI, 1), 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga9006d37909032f8ad238cb8f953115a4af658051f373360010b0c962e513c18f7">kStatus_QSPI_Error</a> = MAKE_STATUS(kStatusGroup_QSPI, 2)
<br/>
 }</td></tr>
<tr class="memdesc:ga9006d37909032f8ad238cb8f953115a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status structure of QSPI.  <a href="group__qspi.html#ga9006d37909032f8ad238cb8f953115a4">More...</a><br/></td></tr>
<tr class="separator:ga9006d37909032f8ad238cb8f953115a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0381ee0bc3439d26a1189e292e44e6b6"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga0381ee0bc3439d26a1189e292e44e6b6">qspi_read_area_t</a> { <br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga0381ee0bc3439d26a1189e292e44e6b6ae47d046fafe2f36a71f54ee103df7a2c">kQSPI_ReadAHB</a> = 0x0U, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga0381ee0bc3439d26a1189e292e44e6b6a84c74f3313d795034c7af6be1a933d57">kQSPI_ReadIP</a>
<br/>
 }</td></tr>
<tr class="memdesc:ga0381ee0bc3439d26a1189e292e44e6b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI read data area, from IP FIFO or AHB buffer.  <a href="group__qspi.html#ga0381ee0bc3439d26a1189e292e44e6b6">More...</a><br/></td></tr>
<tr class="separator:ga0381ee0bc3439d26a1189e292e44e6b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2acaac73027bbcb126d98e0ea4373de"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gaa2acaac73027bbcb126d98e0ea4373de">qspi_command_seq_t</a> { <br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2acaac73027bbcb126d98e0ea4373dea08eb5e396b6f69e58343b4d342075c84">kQSPI_IPSeq</a> = QuadSPI_SPTRCLR_IPPTRC_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2acaac73027bbcb126d98e0ea4373deaaada5445077b4e683eb30513686bbd79">kQSPI_BufferSeq</a> = QuadSPI_SPTRCLR_BFPTRC_MASK
<br/>
 }</td></tr>
<tr class="memdesc:gaa2acaac73027bbcb126d98e0ea4373de"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI command sequence type.  <a href="group__qspi.html#gaa2acaac73027bbcb126d98e0ea4373de">More...</a><br/></td></tr>
<tr class="separator:gaa2acaac73027bbcb126d98e0ea4373de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8832e709c9e9dfda7d14e55813019bd6"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga8832e709c9e9dfda7d14e55813019bd6">qspi_fifo_t</a> { <br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga8832e709c9e9dfda7d14e55813019bd6a871de46c2cffb988e01e2ad489022fd1">kQSPI_TxFifo</a> = QuadSPI_MCR_CLR_TXF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga8832e709c9e9dfda7d14e55813019bd6a1b9d0be39e4238aae341742d0569615e">kQSPI_RxFifo</a> = QuadSPI_MCR_CLR_RXF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga8832e709c9e9dfda7d14e55813019bd6af764de596574813acb3cc6e17c3427fa">kQSPI_AllFifo</a> = QuadSPI_MCR_CLR_TXF_MASK | QuadSPI_MCR_CLR_RXF_MASK
<br/>
 }</td></tr>
<tr class="memdesc:ga8832e709c9e9dfda7d14e55813019bd6"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI buffer type.  <a href="group__qspi.html#ga8832e709c9e9dfda7d14e55813019bd6">More...</a><br/></td></tr>
<tr class="separator:ga8832e709c9e9dfda7d14e55813019bd6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad5667033853bf78f23328a479a17eaa2"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gad5667033853bf78f23328a479a17eaa2">qspi_endianness_t</a> { <br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggad5667033853bf78f23328a479a17eaa2a3fe7fc21c848ff6f539bda069633d86d">kQSPI_64BigEndian</a> = 0x0U, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggad5667033853bf78f23328a479a17eaa2ae0be29f1fded1d7138d7be191b7015bd">kQSPI_32LittleEndian</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggad5667033853bf78f23328a479a17eaa2a6c1315ef947f64f0e49b8386c2509dab">kQSPI_32BigEndian</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggad5667033853bf78f23328a479a17eaa2a6c29c130d5df807189c316219c19e9b9">kQSPI_64LittleEndian</a>
<br/>
 }</td></tr>
<tr class="memdesc:gad5667033853bf78f23328a479a17eaa2"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI transfer endianess.  <a href="group__qspi.html#gad5667033853bf78f23328a479a17eaa2">More...</a><br/></td></tr>
<tr class="separator:gad5667033853bf78f23328a479a17eaa2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2e47ba48984567f2e839abd7532ab75"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gaa2e47ba48984567f2e839abd7532ab75">_qspi_error_flags</a> { <br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75a82ebf1886216b4ecec09af6a6cc914af">kQSPI_DataLearningFail</a> = QuadSPI_FR_DLPFF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75ae78da606993213030e1cd2855f6c685d">kQSPI_TxBufferFill</a> = QuadSPI_FR_TBFF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75a66f4f039dbb8ac448d7f46209f36db1f">kQSPI_TxBufferUnderrun</a> = QuadSPI_FR_TBUF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75ae210fba7b33e0a0fc903bad01959f9bb">kQSPI_IllegalInstruction</a> = QuadSPI_FR_ILLINE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75a9455e4db5cbed29a39c27176d5cb3b80">kQSPI_RxBufferOverflow</a> = QuadSPI_FR_RBOF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75ae66e640f89aa7cf7b7d46549b3aba452">kQSPI_RxBufferDrain</a> = QuadSPI_FR_RBDF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75a584a94d7b5b3f45f169352ea9a269288">kQSPI_AHBSequenceError</a> = QuadSPI_FR_ABSEF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75a0bd70649a9ff6ef4e16f87d612150697">kQSPI_AHBBufferOverflow</a> = QuadSPI_FR_ABOF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75a45b4bc65ee7ca727055555ba80a7fcb7">kQSPI_IPCommandUsageError</a> = QuadSPI_FR_IUEF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75ab0a8e3e663a9b17682351f85bfa45660">kQSPI_IPCommandTriggerDuringAHBAccess</a> = QuadSPI_FR_IPAEF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75ae6cdc3da0c34c3f6b1cd53310ae0bf00">kQSPI_IPCommandTriggerDuringIPAccess</a> = QuadSPI_FR_IPIEF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75a58223f241bc3eaaf8b95c242c2ca86e2">kQSPI_IPCommandTriggerDuringAHBGrant</a> = QuadSPI_FR_IPGEF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75a9ea0badcfc031cb266bd46305b8c72c5">kQSPI_IPCommandTransactionFinished</a> = QuadSPI_FR_TFF_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggaa2e47ba48984567f2e839abd7532ab75a5187e8e76e136e46bc36dcf64d6aa505">kQSPI_FlagAll</a> = 0x8C83F8D1U
<br/>
 }</td></tr>
<tr class="memdesc:gaa2e47ba48984567f2e839abd7532ab75"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI error flags.  <a href="group__qspi.html#gaa2e47ba48984567f2e839abd7532ab75">More...</a><br/></td></tr>
<tr class="separator:gaa2e47ba48984567f2e839abd7532ab75"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac80201db90818bf11e2077721c03191d"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gac80201db90818bf11e2077721c03191d">_qspi_flags</a> { <br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191dab31d2931287b150f85fd6e946b680f85">kQSPI_DataLearningSamplePoint</a> = QuadSPI_SR_DLPSMP_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191dad338c737040d982e80da1067f84ec7b5">kQSPI_TxBufferFull</a> = QuadSPI_SR_TXFULL_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191dadafdf55a7ab0b550c9ea4769f091bb89">kQSPI_TxBufferEnoughData</a> = QuadSPI_SR_TXEDA_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da66b82b71371dc29d8d14d79c6b89e05c">kQSPI_RxDMA</a> = QuadSPI_SR_RXDMA_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da299468e0e4cdc5bb9efce3b9258306ae">kQSPI_RxBufferFull</a> = QuadSPI_SR_RXFULL_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191dab17290cbdc5fc52fff138beb59d5e5bf">kQSPI_RxWatermark</a> = QuadSPI_SR_RXWE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da5e9830dd3846a935b7c4bfa83cda5cde">kQSPI_AHB3BufferFull</a> = QuadSPI_SR_AHB3FUL_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da2bc889249e7bd0f9526fedfc10be0a78">kQSPI_AHB2BufferFull</a> = QuadSPI_SR_AHB2FUL_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da9688c15b08c02d4067b3c6ce2bbc4955">kQSPI_AHB1BufferFull</a> = QuadSPI_SR_AHB1FUL_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da42bcfcb7dfe1c5cec3efa5d26b3372ba">kQSPI_AHB0BufferFull</a> = QuadSPI_SR_AHB0FUL_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da556d615a880a16a4b09c51cb9c0fbce2">kQSPI_AHB3BufferNotEmpty</a> = QuadSPI_SR_AHB3NE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da11643501f7d3dced6945810c8bb7901f">kQSPI_AHB2BufferNotEmpty</a> = QuadSPI_SR_AHB2NE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191dad3c527aaf9d4040a2e89ef56e8df9445">kQSPI_AHB1BufferNotEmpty</a> = QuadSPI_SR_AHB1NE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191daafea8c3058c75dc4b9c866d38200eaae">kQSPI_AHB0BufferNotEmpty</a> = QuadSPI_SR_AHB0NE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da4236214258a3e6be0ef645d3a4d8d39d">kQSPI_AHBTransactionPending</a> = QuadSPI_SR_AHBTRN_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da4007b205447c1bf7921f5c86a14fa16c">kQSPI_AHBCommandPriorityGranted</a> = QuadSPI_SR_AHBGNT_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da847d2a719002e35165cb0aa8130fd75f">kQSPI_AHBAccess</a> = QuadSPI_SR_AHB_ACC_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191daa0f11d2b4e556c57193c5aae011ae80a">kQSPI_IPAccess</a> = QuadSPI_SR_IP_ACC_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191da87c1c4af9ab8541dc78c6a4198939819">kQSPI_Busy</a> = QuadSPI_SR_BUSY_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#ggac80201db90818bf11e2077721c03191dadd5aaac1cedbb2f8e7d23b354a7897a8">kQSPI_StateAll</a> = 0xEF897FE7U
<br/>
 }</td></tr>
<tr class="memdesc:gac80201db90818bf11e2077721c03191d"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI state bit.  <a href="group__qspi.html#gac80201db90818bf11e2077721c03191d">More...</a><br/></td></tr>
<tr class="separator:gac80201db90818bf11e2077721c03191d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80a4c90f4dbe2c7bd06c9ec824e71620"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga80a4c90f4dbe2c7bd06c9ec824e71620">_qspi_interrupt_enable</a> { <br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620a4c7859018c3ba6a32464dad38ceeb98a">kQSPI_DataLearningFailInterruptEnable</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620ab64ec7c3212490cc40063097020338cf">kQSPI_TxBufferFillInterruptEnable</a> = QuadSPI_RSER_TBFIE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620ab8c32ad372c38910a2a81f3c4ac1a2d0">kQSPI_TxBufferUnderrunInterruptEnable</a> = QuadSPI_RSER_TBUIE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620a3a782247c667cd8ffbe58b9242d3c9b8">kQSPI_IllegalInstructionInterruptEnable</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620a5f4318bf4c3620010b64e1825dea1d07">kQSPI_RxBufferOverflowInterruptEnable</a> = QuadSPI_RSER_RBOIE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620a7a6f2d3b6da206d8b3bd0134381886ed">kQSPI_RxBufferDrainInterruptEnable</a> = QuadSPI_RSER_RBDIE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620a2f34733c442c1910b52120adfecf2aa0">kQSPI_AHBSequenceErrorInterruptEnable</a> = QuadSPI_RSER_ABSEIE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620aecd6ab9aae98a046cd4b4e4fbfb105f0">kQSPI_AHBBufferOverflowInterruptEnable</a> = QuadSPI_RSER_ABOIE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620acab70e76c9cbbe53862a0d1f6af712ad">kQSPI_IPCommandUsageErrorInterruptEnable</a> = QuadSPI_RSER_IUEIE_MASK, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620ab6b2676806bbd1d0e5fff969dc1a6232">kQSPI_IPCommandTriggerDuringAHBAccessInterruptEnable</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620ade1d0eba9ec9616b7f4c4f062d6f8e05">kQSPI_IPCommandTriggerDuringIPAccessInterruptEnable</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620abc06806afeb1080ce4cbdf034db18c7c">kQSPI_IPCommandTriggerDuringAHBGrantInterruptEnable</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620a869691c42260fdcc22722697a852b2a9">kQSPI_IPCommandTransactionFinishedInterruptEnable</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga80a4c90f4dbe2c7bd06c9ec824e71620abcdb2dfb68fd5384703ec696dea81468">kQSPI_AllInterruptEnable</a> = 0x8C83F8D1U
<br/>
 }</td></tr>
<tr class="memdesc:ga80a4c90f4dbe2c7bd06c9ec824e71620"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI interrupt enable.  <a href="group__qspi.html#ga80a4c90f4dbe2c7bd06c9ec824e71620">More...</a><br/></td></tr>
<tr class="separator:ga80a4c90f4dbe2c7bd06c9ec824e71620"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga91267f891f702b8e11cd604f0d153933"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga91267f891f702b8e11cd604f0d153933">_qspi_dma_enable</a> { <a class="el" href="group__qspi.html#gga91267f891f702b8e11cd604f0d153933acd40d4e277c00c44a2baeaef30c314ff">kQSPI_RxBufferDrainDMAEnable</a> = QuadSPI_RSER_RBDDE_MASK
 }</td></tr>
<tr class="memdesc:ga91267f891f702b8e11cd604f0d153933"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI DMA request flag.  <a href="group__qspi.html#ga91267f891f702b8e11cd604f0d153933">More...</a><br/></td></tr>
<tr class="separator:ga91267f891f702b8e11cd604f0d153933"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4c5e6599ed955646d4d62a2adee8d002"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga4c5e6599ed955646d4d62a2adee8d002">qspi_dqs_phrase_shift_t</a> { <br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga4c5e6599ed955646d4d62a2adee8d002a94dd1a3609d8de61cdd20d05dc80f251">kQSPI_DQSNoPhraseShift</a> = 0x0U, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga4c5e6599ed955646d4d62a2adee8d002a3972d55777dc0e768c835db39c0066a8">kQSPI_DQSPhraseShift45Degree</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga4c5e6599ed955646d4d62a2adee8d002a66c02aabf568579a8c896c10c489d325">kQSPI_DQSPhraseShift90Degree</a>, 
<br/>
&#160;&#160;<a class="el" href="group__qspi.html#gga4c5e6599ed955646d4d62a2adee8d002addf9b4efca420cfeca813ffeb2354d55">kQSPI_DQSPhraseShift135Degree</a>
<br/>
 }</td></tr>
<tr class="memdesc:ga4c5e6599ed955646d4d62a2adee8d002"><td class="mdescLeft">&#160;</td><td class="mdescRight">Phrase shift number for DQS mode.  <a href="group__qspi.html#ga4c5e6599ed955646d4d62a2adee8d002">More...</a><br/></td></tr>
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Driver version</h2></td></tr>
<tr class="memitem:gab20dd936fe00a3df5289d4f66e5d8e69"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gab20dd936fe00a3df5289d4f66e5d8e69">FSL_QSPI_DRIVER_VERSION</a>&#160;&#160;&#160;(MAKE_VERSION(2, 0, 2))</td></tr>
<tr class="memdesc:gab20dd936fe00a3df5289d4f66e5d8e69"><td class="mdescLeft">&#160;</td><td class="mdescRight">I2C driver version 2.0.2.  <a href="#gab20dd936fe00a3df5289d4f66e5d8e69">More...</a><br/></td></tr>
<tr class="separator:gab20dd936fe00a3df5289d4f66e5d8e69"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Initialization and deinitialization</h2></td></tr>
<tr class="memitem:ga0e7472a25e28d1c09bcd4051b9b6818c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga0e7472a25e28d1c09bcd4051b9b6818c">QSPI_Init</a> (QuadSPI_Type *base, <a class="el" href="group__qspi.html#structqspi__config__t">qspi_config_t</a> *config, uint32_t srcClock_Hz)</td></tr>
<tr class="memdesc:ga0e7472a25e28d1c09bcd4051b9b6818c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes the QSPI module and internal state.  <a href="#ga0e7472a25e28d1c09bcd4051b9b6818c">More...</a><br/></td></tr>
<tr class="separator:ga0e7472a25e28d1c09bcd4051b9b6818c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga38adbb3ea74dce5e9e9baf5adaa5776c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga38adbb3ea74dce5e9e9baf5adaa5776c">QSPI_GetDefaultQspiConfig</a> (<a class="el" href="group__qspi.html#structqspi__config__t">qspi_config_t</a> *config)</td></tr>
<tr class="memdesc:ga38adbb3ea74dce5e9e9baf5adaa5776c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets default settings for QSPI.  <a href="#ga38adbb3ea74dce5e9e9baf5adaa5776c">More...</a><br/></td></tr>
<tr class="separator:ga38adbb3ea74dce5e9e9baf5adaa5776c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1378896ddde1800fb94f6afd5aad5ca2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga1378896ddde1800fb94f6afd5aad5ca2">QSPI_Deinit</a> (QuadSPI_Type *base)</td></tr>
<tr class="memdesc:ga1378896ddde1800fb94f6afd5aad5ca2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Deinitializes the QSPI module.  <a href="#ga1378896ddde1800fb94f6afd5aad5ca2">More...</a><br/></td></tr>
<tr class="separator:ga1378896ddde1800fb94f6afd5aad5ca2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1a00d1764ecc36ab4ce7c817af37b628"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga1a00d1764ecc36ab4ce7c817af37b628">QSPI_SetFlashConfig</a> (QuadSPI_Type *base, <a class="el" href="group__qspi.html#structqspi__flash__config__t">qspi_flash_config_t</a> *config)</td></tr>
<tr class="memdesc:ga1a00d1764ecc36ab4ce7c817af37b628"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the serial flash parameter.  <a href="#ga1a00d1764ecc36ab4ce7c817af37b628">More...</a><br/></td></tr>
<tr class="separator:ga1a00d1764ecc36ab4ce7c817af37b628"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad00bf85bbe7ef011949b8b0828512ec5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gad00bf85bbe7ef011949b8b0828512ec5">QSPI_SoftwareReset</a> (QuadSPI_Type *base)</td></tr>
<tr class="memdesc:gad00bf85bbe7ef011949b8b0828512ec5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Software reset for the QSPI logic.  <a href="#gad00bf85bbe7ef011949b8b0828512ec5">More...</a><br/></td></tr>
<tr class="separator:gad00bf85bbe7ef011949b8b0828512ec5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafc5a4faf1e4b331e3597f9935fda7701"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gafc5a4faf1e4b331e3597f9935fda7701">QSPI_Enable</a> (QuadSPI_Type *base, bool enable)</td></tr>
<tr class="memdesc:gafc5a4faf1e4b331e3597f9935fda7701"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables or disables the QSPI module.  <a href="#gafc5a4faf1e4b331e3597f9935fda7701">More...</a><br/></td></tr>
<tr class="separator:gafc5a4faf1e4b331e3597f9935fda7701"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Status</h2></td></tr>
<tr class="memitem:gadb3593e738eefab160595896905a0346"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gadb3593e738eefab160595896905a0346">QSPI_GetStatusFlags</a> (QuadSPI_Type *base)</td></tr>
<tr class="memdesc:gadb3593e738eefab160595896905a0346"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the state value of QSPI.  <a href="#gadb3593e738eefab160595896905a0346">More...</a><br/></td></tr>
<tr class="separator:gadb3593e738eefab160595896905a0346"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4250bc764815cf145db54fb58beeb4b9"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga4250bc764815cf145db54fb58beeb4b9">QSPI_GetErrorStatusFlags</a> (QuadSPI_Type *base)</td></tr>
<tr class="memdesc:ga4250bc764815cf145db54fb58beeb4b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets QSPI error status flags.  <a href="#ga4250bc764815cf145db54fb58beeb4b9">More...</a><br/></td></tr>
<tr class="separator:ga4250bc764815cf145db54fb58beeb4b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1fe1d4bfac62079c21216eb8ae273caf"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga1fe1d4bfac62079c21216eb8ae273caf">QSPI_ClearErrorFlag</a> (QuadSPI_Type *base, uint32_t mask)</td></tr>
<tr class="memdesc:ga1fe1d4bfac62079c21216eb8ae273caf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clears the QSPI error flags.  <a href="#ga1fe1d4bfac62079c21216eb8ae273caf">More...</a><br/></td></tr>
<tr class="separator:ga1fe1d4bfac62079c21216eb8ae273caf"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Interrupts</h2></td></tr>
<tr class="memitem:ga77cfe54f589439821856ee17d7fcb0db"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga77cfe54f589439821856ee17d7fcb0db">QSPI_EnableInterrupts</a> (QuadSPI_Type *base, uint32_t mask)</td></tr>
<tr class="memdesc:ga77cfe54f589439821856ee17d7fcb0db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables the QSPI interrupts.  <a href="#ga77cfe54f589439821856ee17d7fcb0db">More...</a><br/></td></tr>
<tr class="separator:ga77cfe54f589439821856ee17d7fcb0db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga580d078ddd276d430cf3dc003e6a11e6"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga580d078ddd276d430cf3dc003e6a11e6">QSPI_DisableInterrupts</a> (QuadSPI_Type *base, uint32_t mask)</td></tr>
<tr class="memdesc:ga580d078ddd276d430cf3dc003e6a11e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disables the QSPI interrupts.  <a href="#ga580d078ddd276d430cf3dc003e6a11e6">More...</a><br/></td></tr>
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DMA Control</h2></td></tr>
<tr class="memitem:gae3653d1e7795291a68a59136f80279c6"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gae3653d1e7795291a68a59136f80279c6">QSPI_EnableDMA</a> (QuadSPI_Type *base, uint32_t mask, bool enable)</td></tr>
<tr class="memdesc:gae3653d1e7795291a68a59136f80279c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables the QSPI DMA source.  <a href="#gae3653d1e7795291a68a59136f80279c6">More...</a><br/></td></tr>
<tr class="separator:gae3653d1e7795291a68a59136f80279c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf7f749b3b7ce62871debfe7dc59aaf13"><td class="memItemLeft" align="right" valign="top">static uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gaf7f749b3b7ce62871debfe7dc59aaf13">QSPI_GetTxDataRegisterAddress</a> (QuadSPI_Type *base)</td></tr>
<tr class="memdesc:gaf7f749b3b7ce62871debfe7dc59aaf13"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the Tx data register address.  <a href="#gaf7f749b3b7ce62871debfe7dc59aaf13">More...</a><br/></td></tr>
<tr class="separator:gaf7f749b3b7ce62871debfe7dc59aaf13"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac76b614d300554715b39728d4281e238"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gac76b614d300554715b39728d4281e238">QSPI_GetRxDataRegisterAddress</a> (QuadSPI_Type *base)</td></tr>
<tr class="memdesc:gac76b614d300554715b39728d4281e238"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets the Rx data register address used for DMA operation.  <a href="#gac76b614d300554715b39728d4281e238">More...</a><br/></td></tr>
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Bus Operations</h2></td></tr>
<tr class="memitem:gac607c65a92caa8900bb2d3b8f9f8ebd0"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gac607c65a92caa8900bb2d3b8f9f8ebd0">QSPI_SetIPCommandAddress</a> (QuadSPI_Type *base, uint32_t addr)</td></tr>
<tr class="memdesc:gac607c65a92caa8900bb2d3b8f9f8ebd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the IP command address.  <a href="#gac607c65a92caa8900bb2d3b8f9f8ebd0">More...</a><br/></td></tr>
<tr class="separator:gac607c65a92caa8900bb2d3b8f9f8ebd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae9e10faa05475788e90778b3d3c0e7dc"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gae9e10faa05475788e90778b3d3c0e7dc">QSPI_SetIPCommandSize</a> (QuadSPI_Type *base, uint32_t size)</td></tr>
<tr class="memdesc:gae9e10faa05475788e90778b3d3c0e7dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the IP command size.  <a href="#gae9e10faa05475788e90778b3d3c0e7dc">More...</a><br/></td></tr>
<tr class="separator:gae9e10faa05475788e90778b3d3c0e7dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga07d1bfa5b9527409211f04f1e294f221"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga07d1bfa5b9527409211f04f1e294f221">QSPI_ExecuteIPCommand</a> (QuadSPI_Type *base, uint32_t index)</td></tr>
<tr class="memdesc:ga07d1bfa5b9527409211f04f1e294f221"><td class="mdescLeft">&#160;</td><td class="mdescRight">Executes IP commands located in LUT table.  <a href="#ga07d1bfa5b9527409211f04f1e294f221">More...</a><br/></td></tr>
<tr class="separator:ga07d1bfa5b9527409211f04f1e294f221"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae695194b3abbce3754cc77dae5dc2339"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gae695194b3abbce3754cc77dae5dc2339">QSPI_ExecuteAHBCommand</a> (QuadSPI_Type *base, uint32_t index)</td></tr>
<tr class="memdesc:gae695194b3abbce3754cc77dae5dc2339"><td class="mdescLeft">&#160;</td><td class="mdescRight">Executes AHB commands located in LUT table.  <a href="#gae695194b3abbce3754cc77dae5dc2339">More...</a><br/></td></tr>
<tr class="separator:gae695194b3abbce3754cc77dae5dc2339"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2f10bbac3b5f21a244cacfaae176619e"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga2f10bbac3b5f21a244cacfaae176619e">QSPI_EnableIPParallelMode</a> (QuadSPI_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga2f10bbac3b5f21a244cacfaae176619e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables/disables the QSPI IP command parallel mode.  <a href="#ga2f10bbac3b5f21a244cacfaae176619e">More...</a><br/></td></tr>
<tr class="separator:ga2f10bbac3b5f21a244cacfaae176619e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad09aca0f6e00fdaefcbbc02857dfae72"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gad09aca0f6e00fdaefcbbc02857dfae72">QSPI_EnableAHBParallelMode</a> (QuadSPI_Type *base, bool enable)</td></tr>
<tr class="memdesc:gad09aca0f6e00fdaefcbbc02857dfae72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables/disables the QSPI AHB command parallel mode.  <a href="#gad09aca0f6e00fdaefcbbc02857dfae72">More...</a><br/></td></tr>
<tr class="separator:gad09aca0f6e00fdaefcbbc02857dfae72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga15246abf61c0ea63921a206eaccc9974"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga15246abf61c0ea63921a206eaccc9974">QSPI_UpdateLUT</a> (QuadSPI_Type *base, uint32_t index, uint32_t *cmd)</td></tr>
<tr class="memdesc:ga15246abf61c0ea63921a206eaccc9974"><td class="mdescLeft">&#160;</td><td class="mdescRight">Updates the LUT table.  <a href="#ga15246abf61c0ea63921a206eaccc9974">More...</a><br/></td></tr>
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<tr class="memitem:ga8d2d3f5c2e46e3b7732b774583f2535b"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga8d2d3f5c2e46e3b7732b774583f2535b">QSPI_ClearFifo</a> (QuadSPI_Type *base, uint32_t mask)</td></tr>
<tr class="memdesc:ga8d2d3f5c2e46e3b7732b774583f2535b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clears the QSPI FIFO logic.  <a href="#ga8d2d3f5c2e46e3b7732b774583f2535b">More...</a><br/></td></tr>
<tr class="separator:ga8d2d3f5c2e46e3b7732b774583f2535b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac694b6467a2afd4ef558745989235194"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gac694b6467a2afd4ef558745989235194">QSPI_ClearCommandSequence</a> (QuadSPI_Type *base, <a class="el" href="group__qspi.html#gaa2acaac73027bbcb126d98e0ea4373de">qspi_command_seq_t</a> seq)</td></tr>
<tr class="memdesc:gac694b6467a2afd4ef558745989235194"><td class="mdescLeft">&#160;</td><td class="mdescRight">@ brief Clears the command sequence for the IP/buffer command.  <a href="#gac694b6467a2afd4ef558745989235194">More...</a><br/></td></tr>
<tr class="separator:gac694b6467a2afd4ef558745989235194"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga09d5d2ca0c22fababcb480e6ad574b43"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga09d5d2ca0c22fababcb480e6ad574b43">QSPI_EnableDDRMode</a> (QuadSPI_Type *base, bool enable)</td></tr>
<tr class="memdesc:ga09d5d2ca0c22fababcb480e6ad574b43"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable or disable DDR mode.  <a href="#ga09d5d2ca0c22fababcb480e6ad574b43">More...</a><br/></td></tr>
<tr class="separator:ga09d5d2ca0c22fababcb480e6ad574b43"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24880c10846bbe843ec287091f318e88"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga24880c10846bbe843ec287091f318e88">QSPI_SetReadDataArea</a> (QuadSPI_Type *base, <a class="el" href="group__qspi.html#ga0381ee0bc3439d26a1189e292e44e6b6">qspi_read_area_t</a> area)</td></tr>
<tr class="memdesc:ga24880c10846bbe843ec287091f318e88"><td class="mdescLeft">&#160;</td><td class="mdescRight">@ brief Set the RX buffer readout area.  <a href="#ga24880c10846bbe843ec287091f318e88">More...</a><br/></td></tr>
<tr class="separator:ga24880c10846bbe843ec287091f318e88"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab2c26100daa3f9f95091e524d8bf5c7d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gab2c26100daa3f9f95091e524d8bf5c7d">QSPI_WriteBlocking</a> (QuadSPI_Type *base, uint32_t *buffer, size_t size)</td></tr>
<tr class="memdesc:gab2c26100daa3f9f95091e524d8bf5c7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sends a buffer of data bytes using a blocking method.  <a href="#gab2c26100daa3f9f95091e524d8bf5c7d">More...</a><br/></td></tr>
<tr class="separator:gab2c26100daa3f9f95091e524d8bf5c7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf6225414bf13955c55471779308d531c"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gaf6225414bf13955c55471779308d531c">QSPI_WriteData</a> (QuadSPI_Type *base, uint32_t data)</td></tr>
<tr class="memdesc:gaf6225414bf13955c55471779308d531c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes data into FIFO.  <a href="#gaf6225414bf13955c55471779308d531c">More...</a><br/></td></tr>
<tr class="separator:gaf6225414bf13955c55471779308d531c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4aab7113f914858544075e60dc3b6c4f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga4aab7113f914858544075e60dc3b6c4f">QSPI_ReadBlocking</a> (QuadSPI_Type *base, uint32_t *buffer, size_t size)</td></tr>
<tr class="memdesc:ga4aab7113f914858544075e60dc3b6c4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receives a buffer of data bytes using a blocking method.  <a href="#ga4aab7113f914858544075e60dc3b6c4f">More...</a><br/></td></tr>
<tr class="separator:ga4aab7113f914858544075e60dc3b6c4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga673d32dc8663771f44cdda19b091a5d3"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga673d32dc8663771f44cdda19b091a5d3">QSPI_ReadData</a> (QuadSPI_Type *base)</td></tr>
<tr class="memdesc:ga673d32dc8663771f44cdda19b091a5d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receives data from data FIFO.  <a href="#ga673d32dc8663771f44cdda19b091a5d3">More...</a><br/></td></tr>
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Transactional</h2></td></tr>
<tr class="memitem:gaba3ec60feea5813ae34fc7fb75f6d2db"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#gaba3ec60feea5813ae34fc7fb75f6d2db">QSPI_TransferSendBlocking</a> (QuadSPI_Type *base, <a class="el" href="group__qspi.html#structqspi__transfer__t">qspi_transfer_t</a> *xfer)</td></tr>
<tr class="memdesc:gaba3ec60feea5813ae34fc7fb75f6d2db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes data to the QSPI transmit buffer.  <a href="#gaba3ec60feea5813ae34fc7fb75f6d2db">More...</a><br/></td></tr>
<tr class="separator:gaba3ec60feea5813ae34fc7fb75f6d2db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2734478dd21ba237b925e1e86e147580"><td class="memItemLeft" align="right" valign="top">static void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ga2734478dd21ba237b925e1e86e147580">QSPI_TransferReceiveBlocking</a> (QuadSPI_Type *base, <a class="el" href="group__qspi.html#structqspi__transfer__t">qspi_transfer_t</a> *xfer)</td></tr>
<tr class="memdesc:ga2734478dd21ba237b925e1e86e147580"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads data from the QSPI receive buffer in polling way.  <a href="#ga2734478dd21ba237b925e1e86e147580">More...</a><br/></td></tr>
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<hr/><h2 class="groupheader">Data Structure Documentation</h2>
<a name="structqspi__dqs__config__t" id="structqspi__dqs__config__t"></a>
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          <td class="memname">struct qspi_dqs_config_t</td>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
<tr class="memitem:ab166711d9c9ea0accacffbd9463ba91a"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab166711d9c9ea0accacffbd9463ba91a"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ab166711d9c9ea0accacffbd9463ba91a">portADelayTapNum</a></td></tr>
<tr class="memdesc:ab166711d9c9ea0accacffbd9463ba91a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Delay chain tap number selection for QSPI port A DQS. <br/></td></tr>
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<tr class="memitem:a29bc6e7eb4849cc0a1f813891e08a9cc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a29bc6e7eb4849cc0a1f813891e08a9cc"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a29bc6e7eb4849cc0a1f813891e08a9cc">portBDelayTapNum</a></td></tr>
<tr class="memdesc:a29bc6e7eb4849cc0a1f813891e08a9cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Delay chain tap number selection for QSPI port B DQS. <br/></td></tr>
<tr class="separator:a29bc6e7eb4849cc0a1f813891e08a9cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a41a08deef01859490a87688da1a2f166"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a41a08deef01859490a87688da1a2f166"></a>
<a class="el" href="group__qspi.html#ga4c5e6599ed955646d4d62a2adee8d002">qspi_dqs_phrase_shift_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a41a08deef01859490a87688da1a2f166">shift</a></td></tr>
<tr class="memdesc:a41a08deef01859490a87688da1a2f166"><td class="mdescLeft">&#160;</td><td class="mdescRight">Phase shift for internal DQS generation. <br/></td></tr>
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<tr class="memitem:a501b65137e9c19834a56df7812708328"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a501b65137e9c19834a56df7812708328"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a501b65137e9c19834a56df7812708328">enableDQSClkInverse</a></td></tr>
<tr class="memdesc:a501b65137e9c19834a56df7812708328"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable inverse clock for internal DQS generation. <br/></td></tr>
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<tr class="memitem:a3d373d727aeb713b1475bc32ede02f7e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a3d373d727aeb713b1475bc32ede02f7e"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a3d373d727aeb713b1475bc32ede02f7e">enableDQSPadLoopback</a></td></tr>
<tr class="memdesc:a3d373d727aeb713b1475bc32ede02f7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable DQS loop back from DQS pad. <br/></td></tr>
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<tr class="memitem:a22a7cacc9e4f07ea4408694387b541a5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a22a7cacc9e4f07ea4408694387b541a5"></a>
bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a22a7cacc9e4f07ea4408694387b541a5">enableDQSLoopback</a></td></tr>
<tr class="memdesc:a22a7cacc9e4f07ea4408694387b541a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable DQS loop back. <br/></td></tr>
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</div>
</div>
<a name="structqspi__flash__timing__t" id="structqspi__flash__timing__t"></a>
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          <td class="memname">struct qspi_flash_timing_t</td>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a1c4812527eaebb35bab982a6635b4106">dataHoldTime</a></td></tr>
<tr class="memdesc:a1c4812527eaebb35bab982a6635b4106"><td class="mdescLeft">&#160;</td><td class="mdescRight">Serial flash data in hold time. <br/></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a46b400bc95b18888574e5d20ae4c2c1e">CSHoldTime</a></td></tr>
<tr class="memdesc:a46b400bc95b18888574e5d20ae4c2c1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Serial flash CS hold time in terms of serial flash clock cycles. <br/></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a94b7c0ea1ba1f3dbf06b11062d0e8e85">CSSetupTime</a></td></tr>
<tr class="memdesc:a94b7c0ea1ba1f3dbf06b11062d0e8e85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Serial flash CS setup time in terms of serial flash clock cycles. <br/></td></tr>
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<a name="structqspi__config__t" id="structqspi__config__t"></a>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a4636154d339f8a457267a51d17c6028f">clockSource</a></td></tr>
<tr class="memdesc:a4636154d339f8a457267a51d17c6028f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clock source for QSPI module. <br/></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ab90e8b90f6ac0da5ce3102ec2104e6f7">baudRate</a></td></tr>
<tr class="memdesc:ab90e8b90f6ac0da5ce3102ec2104e6f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Serial flash clock baud rate. <br/></td></tr>
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<tr class="memitem:aacef56c9b3a210643d8d3de452dbf1b5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="aacef56c9b3a210643d8d3de452dbf1b5"></a>
uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#aacef56c9b3a210643d8d3de452dbf1b5">txWatermark</a></td></tr>
<tr class="memdesc:aacef56c9b3a210643d8d3de452dbf1b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI transmit watermark value. <br/></td></tr>
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<tr class="memitem:aab860bcdf2dd6e4cfc708484330334c1"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#aab860bcdf2dd6e4cfc708484330334c1">rxWatermark</a></td></tr>
<tr class="memdesc:aab860bcdf2dd6e4cfc708484330334c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">QSPI receive watermark value.  <a href="#aab860bcdf2dd6e4cfc708484330334c1">More...</a><br/></td></tr>
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<tr class="memitem:ac4a1f15dc587c01444fc506b32d82b1f"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ac4a1f15dc587c01444fc506b32d82b1f">AHBbufferSize</a> [FSL_FEATURE_QSPI_AHB_BUFFER_COUNT]</td></tr>
<tr class="memdesc:ac4a1f15dc587c01444fc506b32d82b1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">AHB buffer size.  <a href="#ac4a1f15dc587c01444fc506b32d82b1f">More...</a><br/></td></tr>
<tr class="separator:ac4a1f15dc587c01444fc506b32d82b1f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0b223821f4f9a57e61244b66da926113"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a0b223821f4f9a57e61244b66da926113">AHBbufferMaster</a> [FSL_FEATURE_QSPI_AHB_BUFFER_COUNT]</td></tr>
<tr class="memdesc:a0b223821f4f9a57e61244b66da926113"><td class="mdescLeft">&#160;</td><td class="mdescRight">AHB buffer master.  <a href="#a0b223821f4f9a57e61244b66da926113">More...</a><br/></td></tr>
<tr class="separator:a0b223821f4f9a57e61244b66da926113"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8d0e52b14b97ed123ff72a7878e4bb67"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a8d0e52b14b97ed123ff72a7878e4bb67">enableAHBbuffer3AllMaster</a></td></tr>
<tr class="memdesc:a8d0e52b14b97ed123ff72a7878e4bb67"><td class="mdescLeft">&#160;</td><td class="mdescRight">Is AHB buffer3 for all master.  <a href="#a8d0e52b14b97ed123ff72a7878e4bb67">More...</a><br/></td></tr>
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<a class="el" href="group__qspi.html#ga0381ee0bc3439d26a1189e292e44e6b6">qspi_read_area_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a29b0ae614176264f9d58d2152e80cd70">area</a></td></tr>
<tr class="memdesc:a29b0ae614176264f9d58d2152e80cd70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Which area Rx data readout. <br/></td></tr>
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bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#ad280dc96ddc5397ce1cde0d8b1104098">enableQspi</a></td></tr>
<tr class="memdesc:ad280dc96ddc5397ce1cde0d8b1104098"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable QSPI after initialization. <br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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<a name="structqspi__flash__config__t" id="structqspi__flash__config__t"></a>
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          <td class="memname">struct qspi_flash_config_t</td>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#adb2a4c29ddc58b85de0d82f75b0f045b">flashA1Size</a></td></tr>
<tr class="memdesc:adb2a4c29ddc58b85de0d82f75b0f045b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash A1 size. <br/></td></tr>
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<tr class="memitem:acace5b5a54558a7c1cbe9e3ab4948a82"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="acace5b5a54558a7c1cbe9e3ab4948a82"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#acace5b5a54558a7c1cbe9e3ab4948a82">flashA2Size</a></td></tr>
<tr class="memdesc:acace5b5a54558a7c1cbe9e3ab4948a82"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash A2 size. <br/></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a415ea1611adead970da3abd8de2d3f40">flashB1Size</a></td></tr>
<tr class="memdesc:a415ea1611adead970da3abd8de2d3f40"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash B1 size. <br/></td></tr>
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<tr class="memitem:a951fddb2a65c4d9ea47559706d3467cb"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a951fddb2a65c4d9ea47559706d3467cb"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a951fddb2a65c4d9ea47559706d3467cb">flashB2Size</a></td></tr>
<tr class="memdesc:a951fddb2a65c4d9ea47559706d3467cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash B2 size. <br/></td></tr>
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uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a6a0feb5d24a33026c8f539004ba60ce3">lookuptable</a> [FSL_FEATURE_QSPI_LUT_DEPTH]</td></tr>
<tr class="memdesc:a6a0feb5d24a33026c8f539004ba60ce3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash command in LUT. <br/></td></tr>
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<tr class="memitem:a362347a0f5e9899540f58e9d2826c868"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a362347a0f5e9899540f58e9d2826c868"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a362347a0f5e9899540f58e9d2826c868">CSHoldTime</a></td></tr>
<tr class="memdesc:a362347a0f5e9899540f58e9d2826c868"><td class="mdescLeft">&#160;</td><td class="mdescRight">CS line hold time. <br/></td></tr>
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<tr class="memitem:a411afc45b9fabb624cad4bb0cd2e16f5"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a411afc45b9fabb624cad4bb0cd2e16f5"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a411afc45b9fabb624cad4bb0cd2e16f5">CSSetupTime</a></td></tr>
<tr class="memdesc:a411afc45b9fabb624cad4bb0cd2e16f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CS line setup time. <br/></td></tr>
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<tr class="memitem:a6b77c14127052ae12253deec016c9dbc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6b77c14127052ae12253deec016c9dbc"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a6b77c14127052ae12253deec016c9dbc">cloumnspace</a></td></tr>
<tr class="memdesc:a6b77c14127052ae12253deec016c9dbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Column space size. <br/></td></tr>
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<tr class="memitem:a0722287c779f056eda14e0e1be68de04"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0722287c779f056eda14e0e1be68de04"></a>
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a0722287c779f056eda14e0e1be68de04">dataLearnValue</a></td></tr>
<tr class="memdesc:a0722287c779f056eda14e0e1be68de04"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Learn value if enable data learn. <br/></td></tr>
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<tr class="memitem:a83ac59682812f8f55a5be71c2ff9e579"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__qspi.html#gad5667033853bf78f23328a479a17eaa2">qspi_endianness_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a83ac59682812f8f55a5be71c2ff9e579">endian</a></td></tr>
<tr class="memdesc:a83ac59682812f8f55a5be71c2ff9e579"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash data endianess.  <a href="#a83ac59682812f8f55a5be71c2ff9e579">More...</a><br/></td></tr>
<tr class="separator:a83ac59682812f8f55a5be71c2ff9e579"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:add68d248634adee8b831a50bada4c37d"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#add68d248634adee8b831a50bada4c37d">enableWordAddress</a></td></tr>
<tr class="memdesc:add68d248634adee8b831a50bada4c37d"><td class="mdescLeft">&#160;</td><td class="mdescRight">If enable word address.  <a href="#add68d248634adee8b831a50bada4c37d">More...</a><br/></td></tr>
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<h4 class="groupheader">Field Documentation</h4>
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          <td class="memname"><a class="el" href="group__qspi.html#gad5667033853bf78f23328a479a17eaa2">qspi_endianness_t</a> qspi_flash_config_t::endian</td>
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<a name="structqspi__transfer__t" id="structqspi__transfer__t"></a>
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          <td class="memname">struct qspi_transfer_t</td>
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<tr><td colspan="2"><h3>Data Fields</h3></td></tr>
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uint32_t *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#aa543a15bba26a35f1ea6bc8a1d6bac3f">data</a></td></tr>
<tr class="memdesc:aa543a15bba26a35f1ea6bc8a1d6bac3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to data to transmit. <br/></td></tr>
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size_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspi.html#a0570176d8c8dac4e5a64f52505d07138">dataSize</a></td></tr>
<tr class="memdesc:a0570176d8c8dac4e5a64f52505d07138"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bytes to be transmit. <br/></td></tr>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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          <td class="memname">#define FSL_QSPI_DRIVER_VERSION&#160;&#160;&#160;(MAKE_VERSION(2, 0, 2))</td>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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        <tr>
          <td class="memname">enum <a class="el" href="group__qspi.html#ga9006d37909032f8ad238cb8f953115a4">_status_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga9006d37909032f8ad238cb8f953115a4a650abd7e718c3d31a1b1c31628223255"></a>kStatus_QSPI_Idle</em>&nbsp;</td><td class="fielddoc">
<p>QSPI is in idle state. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga9006d37909032f8ad238cb8f953115a4adc835d439498f87c2f72a4b0681d64a9"></a>kStatus_QSPI_Busy</em>&nbsp;</td><td class="fielddoc">
<p>QSPI is busy. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga9006d37909032f8ad238cb8f953115a4af658051f373360010b0c962e513c18f7"></a>kStatus_QSPI_Error</em>&nbsp;</td><td class="fielddoc">
<p>Error occurred during QSPI transfer. </p>
</td></tr>
</table>

</div>
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<a class="anchor" id="ga0381ee0bc3439d26a1189e292e44e6b6"></a>
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        <tr>
          <td class="memname">enum <a class="el" href="group__qspi.html#ga0381ee0bc3439d26a1189e292e44e6b6">qspi_read_area_t</a></td>
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      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga0381ee0bc3439d26a1189e292e44e6b6ae47d046fafe2f36a71f54ee103df7a2c"></a>kQSPI_ReadAHB</em>&nbsp;</td><td class="fielddoc">
<p>QSPI read from AHB buffer. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga0381ee0bc3439d26a1189e292e44e6b6a84c74f3313d795034c7af6be1a933d57"></a>kQSPI_ReadIP</em>&nbsp;</td><td class="fielddoc">
<p>QSPI read from IP FIFO. </p>
</td></tr>
</table>

</div>
</div>
<a class="anchor" id="gaa2acaac73027bbcb126d98e0ea4373de"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">enum <a class="el" href="group__qspi.html#gaa2acaac73027bbcb126d98e0ea4373de">qspi_command_seq_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaa2acaac73027bbcb126d98e0ea4373dea08eb5e396b6f69e58343b4d342075c84"></a>kQSPI_IPSeq</em>&nbsp;</td><td class="fielddoc">
<p>IP command sequence. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2acaac73027bbcb126d98e0ea4373deaaada5445077b4e683eb30513686bbd79"></a>kQSPI_BufferSeq</em>&nbsp;</td><td class="fielddoc">
<p>Buffer command sequence. </p>
</td></tr>
</table>

</div>
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<a class="anchor" id="ga8832e709c9e9dfda7d14e55813019bd6"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__qspi.html#ga8832e709c9e9dfda7d14e55813019bd6">qspi_fifo_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga8832e709c9e9dfda7d14e55813019bd6a871de46c2cffb988e01e2ad489022fd1"></a>kQSPI_TxFifo</em>&nbsp;</td><td class="fielddoc">
<p>QSPI Tx FIFO. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga8832e709c9e9dfda7d14e55813019bd6a1b9d0be39e4238aae341742d0569615e"></a>kQSPI_RxFifo</em>&nbsp;</td><td class="fielddoc">
<p>QSPI Rx FIFO. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga8832e709c9e9dfda7d14e55813019bd6af764de596574813acb3cc6e17c3427fa"></a>kQSPI_AllFifo</em>&nbsp;</td><td class="fielddoc">
<p>QSPI all FIFO, including Tx and Rx. </p>
</td></tr>
</table>

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<a class="anchor" id="gad5667033853bf78f23328a479a17eaa2"></a>
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          <td class="memname">enum <a class="el" href="group__qspi.html#gad5667033853bf78f23328a479a17eaa2">qspi_endianness_t</a></td>
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      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggad5667033853bf78f23328a479a17eaa2a3fe7fc21c848ff6f539bda069633d86d"></a>kQSPI_64BigEndian</em>&nbsp;</td><td class="fielddoc">
<p>64 bits big endian </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggad5667033853bf78f23328a479a17eaa2ae0be29f1fded1d7138d7be191b7015bd"></a>kQSPI_32LittleEndian</em>&nbsp;</td><td class="fielddoc">
<p>32 bit little endian </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggad5667033853bf78f23328a479a17eaa2a6c1315ef947f64f0e49b8386c2509dab"></a>kQSPI_32BigEndian</em>&nbsp;</td><td class="fielddoc">
<p>32 bit big endian </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggad5667033853bf78f23328a479a17eaa2a6c29c130d5df807189c316219c19e9b9"></a>kQSPI_64LittleEndian</em>&nbsp;</td><td class="fielddoc">
<p>64 bit little endian </p>
</td></tr>
</table>

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        <tr>
          <td class="memname">enum <a class="el" href="group__qspi.html#gaa2e47ba48984567f2e839abd7532ab75">_qspi_error_flags</a></td>
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      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75a82ebf1886216b4ecec09af6a6cc914af"></a>kQSPI_DataLearningFail</em>&nbsp;</td><td class="fielddoc">
<p>Data learning pattern failure flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75ae78da606993213030e1cd2855f6c685d"></a>kQSPI_TxBufferFill</em>&nbsp;</td><td class="fielddoc">
<p>Tx buffer fill flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75a66f4f039dbb8ac448d7f46209f36db1f"></a>kQSPI_TxBufferUnderrun</em>&nbsp;</td><td class="fielddoc">
<p>Tx buffer underrun flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75ae210fba7b33e0a0fc903bad01959f9bb"></a>kQSPI_IllegalInstruction</em>&nbsp;</td><td class="fielddoc">
<p>Illegal instruction error flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75a9455e4db5cbed29a39c27176d5cb3b80"></a>kQSPI_RxBufferOverflow</em>&nbsp;</td><td class="fielddoc">
<p>Rx buffer overflow flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75ae66e640f89aa7cf7b7d46549b3aba452"></a>kQSPI_RxBufferDrain</em>&nbsp;</td><td class="fielddoc">
<p>Rx buffer drain flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75a584a94d7b5b3f45f169352ea9a269288"></a>kQSPI_AHBSequenceError</em>&nbsp;</td><td class="fielddoc">
<p>AHB sequence error flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75a0bd70649a9ff6ef4e16f87d612150697"></a>kQSPI_AHBBufferOverflow</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer overflow flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75a45b4bc65ee7ca727055555ba80a7fcb7"></a>kQSPI_IPCommandUsageError</em>&nbsp;</td><td class="fielddoc">
<p>IP command usage error flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75ab0a8e3e663a9b17682351f85bfa45660"></a>kQSPI_IPCommandTriggerDuringAHBAccess</em>&nbsp;</td><td class="fielddoc">
<p>IP command trigger during AHB access error. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75ae6cdc3da0c34c3f6b1cd53310ae0bf00"></a>kQSPI_IPCommandTriggerDuringIPAccess</em>&nbsp;</td><td class="fielddoc">
<p>IP command trigger cannot be executed. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75a58223f241bc3eaaf8b95c242c2ca86e2"></a>kQSPI_IPCommandTriggerDuringAHBGrant</em>&nbsp;</td><td class="fielddoc">
<p>IP command trigger during AHB grant error. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75a9ea0badcfc031cb266bd46305b8c72c5"></a>kQSPI_IPCommandTransactionFinished</em>&nbsp;</td><td class="fielddoc">
<p>IP command transaction finished flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggaa2e47ba48984567f2e839abd7532ab75a5187e8e76e136e46bc36dcf64d6aa505"></a>kQSPI_FlagAll</em>&nbsp;</td><td class="fielddoc">
<p>All error flag. </p>
</td></tr>
</table>

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          <td class="memname">enum <a class="el" href="group__qspi.html#gac80201db90818bf11e2077721c03191d">_qspi_flags</a></td>
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<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191dab31d2931287b150f85fd6e946b680f85"></a>kQSPI_DataLearningSamplePoint</em>&nbsp;</td><td class="fielddoc">
<p>Data learning sample point. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191dad338c737040d982e80da1067f84ec7b5"></a>kQSPI_TxBufferFull</em>&nbsp;</td><td class="fielddoc">
<p>Tx buffer full flag. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191dadafdf55a7ab0b550c9ea4769f091bb89"></a>kQSPI_TxBufferEnoughData</em>&nbsp;</td><td class="fielddoc">
<p>Tx buffer enough data available. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da66b82b71371dc29d8d14d79c6b89e05c"></a>kQSPI_RxDMA</em>&nbsp;</td><td class="fielddoc">
<p>Rx DMA is requesting or running. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da299468e0e4cdc5bb9efce3b9258306ae"></a>kQSPI_RxBufferFull</em>&nbsp;</td><td class="fielddoc">
<p>Rx buffer full. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191dab17290cbdc5fc52fff138beb59d5e5bf"></a>kQSPI_RxWatermark</em>&nbsp;</td><td class="fielddoc">
<p>Rx buffer watermark exceeded. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da5e9830dd3846a935b7c4bfa83cda5cde"></a>kQSPI_AHB3BufferFull</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer 3 full. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da2bc889249e7bd0f9526fedfc10be0a78"></a>kQSPI_AHB2BufferFull</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer 2 full. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da9688c15b08c02d4067b3c6ce2bbc4955"></a>kQSPI_AHB1BufferFull</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer 1 full. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da42bcfcb7dfe1c5cec3efa5d26b3372ba"></a>kQSPI_AHB0BufferFull</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer 0 full. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da556d615a880a16a4b09c51cb9c0fbce2"></a>kQSPI_AHB3BufferNotEmpty</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer 3 not empty. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da11643501f7d3dced6945810c8bb7901f"></a>kQSPI_AHB2BufferNotEmpty</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer 2 not empty. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191dad3c527aaf9d4040a2e89ef56e8df9445"></a>kQSPI_AHB1BufferNotEmpty</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer 1 not empty. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191daafea8c3058c75dc4b9c866d38200eaae"></a>kQSPI_AHB0BufferNotEmpty</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer 0 not empty. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da4236214258a3e6be0ef645d3a4d8d39d"></a>kQSPI_AHBTransactionPending</em>&nbsp;</td><td class="fielddoc">
<p>AHB access transaction pending. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da4007b205447c1bf7921f5c86a14fa16c"></a>kQSPI_AHBCommandPriorityGranted</em>&nbsp;</td><td class="fielddoc">
<p>AHB command priority granted. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da847d2a719002e35165cb0aa8130fd75f"></a>kQSPI_AHBAccess</em>&nbsp;</td><td class="fielddoc">
<p>AHB access. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191daa0f11d2b4e556c57193c5aae011ae80a"></a>kQSPI_IPAccess</em>&nbsp;</td><td class="fielddoc">
<p>IP access. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191da87c1c4af9ab8541dc78c6a4198939819"></a>kQSPI_Busy</em>&nbsp;</td><td class="fielddoc">
<p>Module busy. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="ggac80201db90818bf11e2077721c03191dadd5aaac1cedbb2f8e7d23b354a7897a8"></a>kQSPI_StateAll</em>&nbsp;</td><td class="fielddoc">
<p>All flags. </p>
</td></tr>
</table>

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          <td class="memname">enum <a class="el" href="group__qspi.html#ga80a4c90f4dbe2c7bd06c9ec824e71620">_qspi_interrupt_enable</a></td>
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<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620a4c7859018c3ba6a32464dad38ceeb98a"></a>kQSPI_DataLearningFailInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>Data learning pattern failure interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620ab64ec7c3212490cc40063097020338cf"></a>kQSPI_TxBufferFillInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>Tx buffer fill interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620ab8c32ad372c38910a2a81f3c4ac1a2d0"></a>kQSPI_TxBufferUnderrunInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>Tx buffer underrun interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620a3a782247c667cd8ffbe58b9242d3c9b8"></a>kQSPI_IllegalInstructionInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>Illegal instruction error interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620a5f4318bf4c3620010b64e1825dea1d07"></a>kQSPI_RxBufferOverflowInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>Rx buffer overflow interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620a7a6f2d3b6da206d8b3bd0134381886ed"></a>kQSPI_RxBufferDrainInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>Rx buffer drain interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620a2f34733c442c1910b52120adfecf2aa0"></a>kQSPI_AHBSequenceErrorInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>AHB sequence error interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620aecd6ab9aae98a046cd4b4e4fbfb105f0"></a>kQSPI_AHBBufferOverflowInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>AHB buffer overflow interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620acab70e76c9cbbe53862a0d1f6af712ad"></a>kQSPI_IPCommandUsageErrorInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>IP command usage error interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620ab6b2676806bbd1d0e5fff969dc1a6232"></a>kQSPI_IPCommandTriggerDuringAHBAccessInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>IP command trigger during AHB access error. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620ade1d0eba9ec9616b7f4c4f062d6f8e05"></a>kQSPI_IPCommandTriggerDuringIPAccessInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>IP command trigger cannot be executed. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620abc06806afeb1080ce4cbdf034db18c7c"></a>kQSPI_IPCommandTriggerDuringAHBGrantInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>IP command trigger during AHB grant error. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620a869691c42260fdcc22722697a852b2a9"></a>kQSPI_IPCommandTransactionFinishedInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>IP command transaction finished interrupt enable. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga80a4c90f4dbe2c7bd06c9ec824e71620abcdb2dfb68fd5384703ec696dea81468"></a>kQSPI_AllInterruptEnable</em>&nbsp;</td><td class="fielddoc">
<p>All error interrupt enable. </p>
</td></tr>
</table>

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          <td class="memname">enum <a class="el" href="group__qspi.html#ga91267f891f702b8e11cd604f0d153933">_qspi_dma_enable</a></td>
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga91267f891f702b8e11cd604f0d153933acd40d4e277c00c44a2baeaef30c314ff"></a>kQSPI_RxBufferDrainDMAEnable</em>&nbsp;</td><td class="fielddoc">
<p>Rx buffer drain DMA. </p>
</td></tr>
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          <td class="memname">enum <a class="el" href="group__qspi.html#ga4c5e6599ed955646d4d62a2adee8d002">qspi_dqs_phrase_shift_t</a></td>
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<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga4c5e6599ed955646d4d62a2adee8d002a94dd1a3609d8de61cdd20d05dc80f251"></a>kQSPI_DQSNoPhraseShift</em>&nbsp;</td><td class="fielddoc">
<p>No phase shift. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga4c5e6599ed955646d4d62a2adee8d002a3972d55777dc0e768c835db39c0066a8"></a>kQSPI_DQSPhraseShift45Degree</em>&nbsp;</td><td class="fielddoc">
<p>Select 45 degree phase shift. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga4c5e6599ed955646d4d62a2adee8d002a66c02aabf568579a8c896c10c489d325"></a>kQSPI_DQSPhraseShift90Degree</em>&nbsp;</td><td class="fielddoc">
<p>Select 90 degree phase shift. </p>
</td></tr>
<tr><td class="fieldname"><em><a class="anchor" id="gga4c5e6599ed955646d4d62a2adee8d002addf9b4efca420cfeca813ffeb2354d55"></a>kQSPI_DQSPhraseShift135Degree</em>&nbsp;</td><td class="fielddoc">
<p>Select 135 degree phase shift. </p>
</td></tr>
</table>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">void QSPI_Init </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__qspi.html#structqspi__config__t">qspi_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>srcClock_Hz</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function enables the clock for QSPI and also configures the QSPI with the input configure parameters. Users should call this function before any QSPI operations.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">config</td><td>QSPI configure structure. </td></tr>
    <tr><td class="paramname">srcClock_Hz</td><td>QSPI source clock frequency in Hz. </td></tr>
  </table>
  </dd>
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          <td class="memname">void QSPI_GetDefaultQspiConfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__qspi.html#structqspi__config__t">qspi_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em></td><td>)</td>
          <td></td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">config</td><td>QSPI configuration structure. </td></tr>
  </table>
  </dd>
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          <td class="memname">void QSPI_Deinit </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
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<p>Clears the QSPI state and QSPI module registers. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void QSPI_SetFlashConfig </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__qspi.html#structqspi__flash__config__t">qspi_flash_config_t</a> *&#160;</td>
          <td class="paramname"><em>config</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function configures the serial flash relevant parameters, such as the size, command, and so on. The flash configuration value cannot have a default value. The user needs to configure it according to the QSPI features.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">config</td><td>Flash configuration parameters. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void QSPI_SoftwareReset </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
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<p>This function sets the software reset flags for both AHB and buffer domain and resets both AHB buffer and also IP FIFOs.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_Enable </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">enable</td><td>True means enable QSPI, false means disable. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static uint32_t QSPI_GetStatusFlags </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>status flag, use status flag to AND <a class="el" href="group__qspi.html#gac80201db90818bf11e2077721c03191d" title="QSPI state bit. ">_qspi_flags</a> could get the related status. </dd></dl>

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          <td class="memname">static uint32_t QSPI_GetErrorStatusFlags </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>status flag, use status flag to AND <a class="el" href="group__qspi.html#gaa2e47ba48984567f2e839abd7532ab75" title="QSPI error flags. ">_qspi_error_flags</a> could get the related status. </dd></dl>

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          <td class="memname">static void QSPI_ClearErrorFlag </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>mask</em>&#160;</td>
        </tr>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">mask</td><td>Which kind of QSPI flags to be cleared, a combination of _qspi_error_flags. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_EnableInterrupts </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>mask</em>&#160;</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">mask</td><td>QSPI interrupt source. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_DisableInterrupts </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>mask</em>&#160;</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">mask</td><td>QSPI interrupt source. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_EnableDMA </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>mask</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">mask</td><td>QSPI DMA source. </td></tr>
    <tr><td class="paramname">enable</td><td>True means enable DMA, false means disable. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static uint32_t QSPI_GetTxDataRegisterAddress </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
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<p>It is used for DMA operation.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>QSPI Tx data register address. </dd></dl>

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          <td class="memname">uint32_t QSPI_GetRxDataRegisterAddress </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
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<p>This function returns the Rx data register address or Rx buffer address according to the Rx read area settings.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>QSPI Rx data register address. </dd></dl>

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          <td class="memname">static void QSPI_SetIPCommandAddress </td>
          <td>(</td>
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          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>addr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">addr</td><td>IP command address. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_SetIPCommandSize </td>
          <td>(</td>
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          <td class="paramname"><em>base</em>, </td>
        </tr>
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          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>size</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">size</td><td>IP command size. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void QSPI_ExecuteIPCommand </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>index</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">index</td><td>IP command located in which LUT table index. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void QSPI_ExecuteAHBCommand </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>index</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">index</td><td>AHB command located in which LUT table index. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_EnableIPParallelMode </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">enable</td><td>True means enable parallel mode, false means disable parallel mode. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_EnableAHBParallelMode </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">enable</td><td>True means enable parallel mode, false means disable parallel mode. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void QSPI_UpdateLUT </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>index</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t *&#160;</td>
          <td class="paramname"><em>cmd</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">index</td><td>Which LUT index needs to be located. It should be an integer divided by 4. </td></tr>
    <tr><td class="paramname">cmd</td><td>Command sequence array. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_ClearFifo </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>mask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">mask</td><td>Which kind of QSPI FIFO to be cleared. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_ClearCommandSequence </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__qspi.html#gaa2acaac73027bbcb126d98e0ea4373de">qspi_command_seq_t</a>&#160;</td>
          <td class="paramname"><em>seq</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function can reset the command sequence. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>QSPI base address. </td></tr>
    <tr><td class="paramname">seq</td><td>Which command sequence need to reset, IP command, buffer command or both. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_EnableDDRMode </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">bool&#160;</td>
          <td class="paramname"><em>enable</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>QSPI base pointer </td></tr>
    <tr><td class="paramname">eanble</td><td>True means enable DDR mode, false means disable DDR mode. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void QSPI_SetReadDataArea </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__qspi.html#ga0381ee0bc3439d26a1189e292e44e6b6">qspi_read_area_t</a>&#160;</td>
          <td class="paramname"><em>area</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<p>This function can set the RX buffer readout, from AHB bus or IP Bus. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>QSPI base address. </td></tr>
    <tr><td class="paramname">area</td><td>QSPI Rx buffer readout area. AHB bus buffer or IP bus buffer. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void QSPI_WriteBlocking </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t *&#160;</td>
          <td class="paramname"><em>buffer</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">size_t&#160;</td>
          <td class="paramname"><em>size</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="section note"><dt>Note</dt><dd>This function blocks via polling until all bytes have been sent. </dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>QSPI base pointer </td></tr>
    <tr><td class="paramname">buffer</td><td>The data bytes to send </td></tr>
    <tr><td class="paramname">size</td><td>The number of data bytes to send </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_WriteData </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>data</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>QSPI base pointer </td></tr>
    <tr><td class="paramname">data</td><td>The data bytes to send </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">void QSPI_ReadBlocking </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t *&#160;</td>
          <td class="paramname"><em>buffer</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">size_t&#160;</td>
          <td class="paramname"><em>size</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="section note"><dt>Note</dt><dd>This function blocks via polling until all bytes have been sent. Users shall notice that this receive size shall not bigger than 64 bytes. As this interface is used to read flash status registers. For flash contents read, please use AHB bus read, this is much more efficiency.</dd></dl>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>QSPI base pointer </td></tr>
    <tr><td class="paramname">buffer</td><td>The data bytes to send </td></tr>
    <tr><td class="paramname">size</td><td>The number of data bytes to receive </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">uint32_t QSPI_ReadData </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>QSPI base pointer </td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The data in the FIFO. </dd></dl>

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          <td class="memname">static void QSPI_TransferSendBlocking </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__qspi.html#structqspi__transfer__t">qspi_transfer_t</a> *&#160;</td>
          <td class="paramname"><em>xfer</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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<p>This function writes a continuous data to the QSPI transmit FIFO. This function is a block function and can return only when finished. This function uses polling methods.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">xfer</td><td>QSPI transfer structure. </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">static void QSPI_TransferReceiveBlocking </td>
          <td>(</td>
          <td class="paramtype">QuadSPI_Type *&#160;</td>
          <td class="paramname"><em>base</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__qspi.html#structqspi__transfer__t">qspi_transfer_t</a> *&#160;</td>
          <td class="paramname"><em>xfer</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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<p>This function reads continuous data from the QSPI receive buffer/FIFO. This function is a blocking function and can return only when finished. This function uses polling methods. Users shall notice that this receive size shall not bigger than 64 bytes. As this interface is used to read flash status registers. For flash contents read, please use AHB bus read, this is much more efficiency.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">base</td><td>Pointer to QuadSPI Type. </td></tr>
    <tr><td class="paramname">xfer</td><td>QSPI transfer structure. </td></tr>
  </table>
  </dd>
</dl>

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